//rectbegin
 reg [6:0] REGA,REGB;//←レジスタの定義
//rectend
always @(posedge CLK or negedge RST)
  begin
    if(!RST)
      begin
	REGA<=0;
//rectbegin
	REGB<=0; // ← REGBの初期化の追加
//rectend
	count<=0;
      end
    else if((decimal!=0) && (count < 2))
      begin
	REGA<=REGA*10+d;
	count<=count+1;
      end
//rectbegin
    else if(plus)   //← +キーが押されたら
      begin
	count<=0;
	REGA<=0;
	REGB<=REGA;//←REGAをREGBに移す
      end
//rectend